XC9536 |
RFQ for XC9536 Required Field |
 |
| Product | Manufacturers | Pack | D/C |
| XC9536 | - | PLCC | - |
The XC9536 is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of two 36V18 Function Blocks, providing 800 usable gates with propagation delays of 5 ns. See Figure 2 for the architecture overview.
Features |
| • 5 ns pin-to-pin logic delays on all pins• fCNT to 100 MHz• 36 macrocells with 800 usable gates• Up to 34 user I/O pins• 5 V in-system programmable (ISP)- Endurance of 10,000 program/erase cycles- Program/erase over full commercial voltage and temperature range• Enhanced pin-locking architecture• Flexible 36V18 Function Block- 90 product terms drive any or all of 18 macrocells within Function Block - Global and product term clocks, output enables, set and reset signals• Extensive IEEE Std 1149.1 boundary-scan (JTAG) support• Programmable power reduction mode in each macrocell• Slew rate control on individual outputs• User programmable ground pin capability• Extended pattern security features for design protection• High-drive 24 mA outputs• 3.3 V or 5 V I/O capability• Advanced CMOS 5V FastFLASH technology• Supports parallel programming of more than one XC9500 concurrently• Available in 44-pin PLCC, 44-pin VQFP, and 48-pin CSP packages |
|
Symbol |
Parameter |
Value |
Units |
| VCC | Supply voltage relative to GND |
-0.5 to 7.0 |
V |
| VIN | DC input voltage relative to GND |
-0.5 to VCC + 0.5 |
V |
| VTS | Voltage applied to 3-state output with respect to GND |
-0.5 to VCC + 0.5 |
V |
| TSTG | Storage temperature |
-65 to +150 |
|
| TSOL | Max soldering temperature (10 s @ 1/16 in = 1.5 mm) |
+260 |
